Pulse generator

ABSTRACT

A pulse generator that does not rely upon regeneration is utilized to provide a shaped output pulse in response to an input signal. Three transistors are connected in what is essentially a three stage non-inverting amplifier having appropriate interconnections to provide a pulse output having a standard duration and shape regardless of input characteristics.

United States Patent Jachimek et a1.

[ 51 May 23, 1972 PULSE GENERATOR Inventors: Thomas P. Jachimek, Evergreen Park;

James A. Wrabel, Chicago, both of 111.

Assignee: The Seeburg. Corporation of Delaware,

Chicago, 111,

Filed: Sept. 11, 1970 Appl. No.: 71,585

U.S. C1 ..307/106, 328/59, 307/261 Int. Cl. ..H03k 3/00 Field of Search ..307/l06, 108, 261, 265;

[56] References Cited UNITED STATES PATENTS 3,181,014 4/1965 Clark ..307/106X 3,321,674 5/1967 Felcheck et a1 ..307/l06 X Primary ExaminerHerman J. Hohauser Attorney-Ronald L. Engel, Daniel W. Vittum, Jr., Gomer W. Walters and John A. Waters ABSTRACT A pulse generator that does not rely upon regeneration is utilized to provide a shaped output pulse in response to an input signal. Three transistors are connected in what is essentially a three stage non-inverting amplifier having appropriate interconnections to provide a pulse output having a standard duration and shape regardless of input characteristics.

8 Claims, 1 Drawing Figure PATENTEI] MY 2 3 I972 lNl/E/VTORS THOMAS P JACH/MEK JAMES A. WRABEL PULSE GENERATOR BACKGROUND OF THE INVENTION 1. Field of the Invention This invention relates generally to a circuit for producing a standard pulse output independent of input pulse characteristics and ambient conditions, and, more specifically, this invention relates to a pulse generating circuit for utilization in a vending machine to provide a standard shaped pulse output from a coin switch without being affected by coin bounce."

2. Description of the Prior Art When utilizing high speed information transferring and retrieval arrangements, the possibility of stray signals or discontinuities of an applied signal causing undesired and erroneous information to be inserted into the system is a constant problem. One area in which this problem is particularly troublesome is the use of such circuits in vending machine applications, as the recordal of undesired information can lead to a vend operation before sufficient credit has actually been deposited to warrant such event, thus causing financial loss to the vending machine operator. Further, erroneous information recordal may result in a customer receiving a vend item which he did not select, thus resulting in customer dissatisfaction and ill-will and a subsequent loss of revenue.

One particular area of the vending machine operation that is particularly susceptible to stray signals and signal discontinuities involves the production of electrical signals for use in accumulating credit upon the deposit of coins into the vending machine, When a deposited coin strikes the actuating lever for a coin switch, the resiliency of the switch lever may cause the coin to reverse direction or bounce." This coin bounce appears as a discontinuity or multiple pulse in the signal output of the coin switch. When such a coin switch is utilized with an electronic credit accumulator, such as that disclosed in the application of Edwin J. Meixner entitled CREDIT ACCUMU- LATING ARRANGEMENT, U.S. Pat. Application Ser. No. 759,407, filed on Sept. 12, 1968 and assigned to the same assignee as the subject invention, the discontinuities in the coin switch pulse may result in the accumulation of multiple credits.

A conventional monostable multivibrator could be utilized to shape the coin switch pulse and provide a pulse of standard width. However, the excessive bounce that may occur in a coin switch frequently will render a conventional monostable multivibrator ineffective, as the monostable multivibrator may be sufficiently fast acting to follow the discontinuity. Further, as vending machines are frequently utilized in excessively noisy environments, the regeneration utilized in a conventional monostable multivibrator makes such a circuit undesirable.

SUMMARY OF THE INVENTION The present invention has been developed to overcome the deficiencies noted above and to provide a pulse generator that is particularly useful where line transients and ambient noise create significant problems. Briefly, this invention utilizes what is essentially a three stage non-inverting amplifier that does not employ regenerative feedback. Each stage of the pulse generator employs switching elements, such as transistors. A first pair of transistors are normally conducting when a coin switch pulse is applied to the circuit. Application of a coin switch pulse or other input signal results in turning off of one of the normally conducting transistors. A first capacitor charging arrangement is utilized to prevent the transistor turned off by the input signal from returning to a conducting state for a predetermined time after removal of the input signal to insure that an input signal discontinuity will not cause two output pulses to be produced by the pulse generator.

A second capacitor charging arrangement is utilized to turn off the second normally conducting transistor when the first transistor returns to a conducting state after removal of the input signal. A change in state of the second normally conducting transistor to a non-conducting condition results in a forward bias being applied to a normally non-conducting output transistor. Conduction of the output transistor produces a pulse having a duration determined by the cut off time of the second transistor, which is in turn controlled by the charging rate of the second capacitor charging circuit. Thus, a constant duration output pulse is provided for each input signal and is unaffected by coin switch bounce or other transient or ambient conditions.

Therefore, a primary object of this invention is to provide a pulse generating circuit that produces standard duration output pulses without the use of regenerative feedback.

Another object of this invention is to provide a pulse generating circuit that minimizes the effects of input signal discontinuities and line transients.

A further object of this invention is to provide a pulse generating circuit that minimizes the effects of coin bounce in a vending machine crediting arrangement.

These and other objects, advantages, and features of this invention will hereinafter appear, and for purposes of illustration, but not of limitation, an exemplary embodiment of this invention is shown in the appended drawing.

BRIEF DESCRIPTION OF THE DRAWING The single FIGURE of this application is a schematic circuit diagram of the preferred embodiment of the present invention.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT With reference to the single FIGURE of this application, a pulse generator is illustrated which is adapted to produce standard duration pulses in response to signal inputs and which is unaffected by transient line conditions, such as signal discontinuities, and ambient noise situations. This circuit utilizes three transistors Q1, Q2, and Q3. Transistor Q1 has an emitter 1 l, a base 13, and a collector 15. Emitter 1 l of transistor O1 is connected directly to ground. Base 13 of transistor O1 is connected through a diode 17 to the midpoint 19 of a capacitor 21 and a resistor 23 connected in series between a B- source and ground. An input signal is also applied to point 19 on a line 25, this input signal being any desired signal, such as a coin switch pulse. Collector 15 of transistor O1 is connected to the negative supply by a resistor 27.

Transistor Q2 has an emitter 29, a base 31, and a collector 33. Emitter 29 of transistor Q2 is also connected directly to ground. Base 31 of transistor Q2 is connected to collector 15 of transistor Q1 through a diode 35 and a capacitor 37. A resistor 39 is connected to the 8- supply from the common point of diode 35 and capacitor 37. Collector 33 of transistor O2 is connected to the 8- supply through a resistor 41.

Transistor Q3 has an emitter 43, a base 45, and a collector 47. Emitter 43 of transistor O3 is also connected directly to ground. Base 45 of transistor O3 is connected directly to collector 33 of transistor Q2. Collector 47 of transistor O3 is connected to the 8- supply through a resistor 49. An output from the pulse generating circuit is taken from collector 47 of transistor Q3 on line 50.

When no input signals are present at point 19, transistors Q1 and Q2 are normally conducting. In this state capacitor 21 is charged to a stable condition and the potential of point 19 is fixed by the voltage drop across resistor 23, diode l7, and the emitter-base junction of transistor Q1. This point is sufficiently negative to bias the transistor O1 to conduction.

Upon application of a positive going input pulse, such as a coin switch pulse, diode 17 will be back biased, as will the emitter-base junction of transistor Q1, thus causing transistor Q1 to be shut off. During the time that transistor Q1 is in a conducting state, collector 15 thereof will be only slightly below ground potential. However, when Q1 is turned off by an incoming pulse, collector 15 will go essentially to the negative supply voltage. This will cause capacitor 37 to charge through diode 35 and the emitter-base junction of transistor Q2, thus driving transistor Q2 further into saturation.

After removal of the input signal from point 19, capacitor 21 will start recharging through resistor 23. After a time interval determined by the magnitudes of capacitor 21 and resistor 23 (a 3-millisecond interval being utilized in this particular embodiment), transistor Q1 will again be turned on. This time interval insures that the input signal has been completed to avoid double registry of a single pulse.

As transistor Q1 is turned on, its collector 15 approaches ground potential. Therefore, capacitor 37 will discharge through transistor Q1 and resistor 39. Discharge of capacitor 37 through transistor Q1 and resistor 39 removes the bias voltage from base 31 of transistor Q2, thus causing transistor Q2 to cease conducting.

As transistor Q2 stops conducting, its collector 33 goes toward the negative supply potential, thus turning on transistor Q3. As transistor Q3 begins to conduct, the potential on collector 47 thereof will go from the B- potential to essentially ground, thus producing a positive going output pulse on line 50. An output will continue to be taken from the collector 47 of transistor Q3 as long as transistor Q2 is turned off, which depends upon the discharge rate of capacitor 37 through transistor Q1 and resistor 39. Thus, every turn off of transistor Q1 by reason of the application of an input signal at point 19 will result in a definite predetermined duration pulse on line 50.

The delay resulting from the action of capacitor 21 in permitting transistor Q1 to return to a conducting state after removal of an input signal prevents a number of erroneous credit awards due to coin bounce or other signal discontinuities to be greatly reduced. As a result of the charging action of capacitor 37, a definite duration pulse is produced without regenerative feedback, thereby reducing the problems associated with ambient noise. Therefore, a monostable multivibrator is provided which does not depend upon regeneration and which develops standard duration credit pulses while eliminating most of the coin bounce and noise problems.

The output pulses appearing on line 50 are then conveyed to appropriate circuit locations, such as the inputs of the credit accumulating arrangement disclosed in the aboveidentified Edwin J. Meixner application. Of course, this pulse generator is not restricted to its utilization in connection with coin switches but would prove equally useful in any situation where line transients, signal discontinuities and ambient noise present erroneous information problems.

It should be understood that various modifications, changes, and variations may be made in the arrangements, operations, and details of construction of the elements disclosed herein without departing from the spirit and scope of the present invention.

We claim:

1. A pulse generator comprising:

a first switching device;

input signal means adapted to apply an input signal to said first switching device to change the state of said first switching device in response to input signal presence or absence;

a second switching device;

first timing means responsive to changes in the state of said first switching device to control the state of said second switching device, said first timing means causing said second switching device to change state for a period of time determined by said first timing means in response to specified changes of state of said first switching device; and

a second timing means delaying said specified changes of state of said first switching device for a predetermined period of time to preclude occurrence of said specified changes of state in response to false indications of input signal presence or absence,

whereby a standard duration output pulse is obtained from said second switching device only for each actual input ulse. 2. A pulse generator as claimed in claim 1 and further comprising a third switching device responsive to the output of said second switching device to provide a corresponding standard duration output pulse.

3. A pulse generator as claimed in claim 2 wherein said first, second and third switching devices are first, second and third transistors, respectively.

4. A pulse generator as claimed in claim 1 wherein said first and second timing means are capacitor charging circuits.

5. A pulse generator as claimed in claim 3 wherein said first timing means comprises:

a first capacitor and a first diode connected in series between the collector of said first transistor and the base of said second transistor; and

a resistor connected from the common point of said first capacitor and said first diode to a source of power.

6. A pulse generator as claimed in claim 3 wherein said second timing means comprises a second capacitor connected in series with a second resistor across a source of power, the common point of said second capacitor and said second resistor being connected to the base of said first transistor by a second diode.

7 A pulse generator comprising:

a power supply;

a first transistor having its emitter-collector junction connected across said power supply in series with a collector load resistor;

a first diode;

a first capacitor and a first resistor connected in series across said power supply, the common point of said first capacitor and said first resistor being connected to the base of said first transistor by said first diode;

means for conveying an input signal to the common point of said first capacitor and said first resistor;

a second transistor connected across said power supply in series with a collector load resistor;

a second capacitor and a second diode connected in series between the collector of said first transistor and the base of said second transistor; and

a second resistor connected from the common point of said second capacitor and said second diode to said power pp y whereby a standard duration pulse may be obtained from the collector of said second transistor upon an appropriate input signal change.

8. A pulse generator as claimed in claim 7 and further comprising a third transistor connected across said power supply in series with a collector load resistor, the collector of said second transistor being connected to the base of said third transistor,

whereby the standard duration pulse is obtained from the collector of said third transistor. 

1. A pulse generator comprising: a first switching device; input signal means adapted to apply an input signal to said first switching device to change the state of said first switching device in response to input signal presence or absence; a second switching device; first timing means responsive to changes in the state of said first switching device to control the state of said second switching device, said first timing means causing said second switching device to change state for a period of time determined by said first timing means in response to specified changes of state of said first switching device; and a second timing means delaying said specified changes of state of said first switching device for a predetermined period of time to preclude occurrence of said specified changes of state in response to false indications of input signal presence or absence, whereby a standard duration output pulse is obtained from said second switching device only for each actual input pulse.
 2. A pulse generator as claimed in claim 1 and further comprising a third switching device responsive to the output of said second switching device to provide a corresponding standard duration output pulse.
 3. A pulse generator as claimed in claim 2 wherein said first, second and third switching devices are first, second and third transistors, respectively.
 4. A pulse generator as claimed in claim 1 wherein said first and second timing means are capacitor charging circuits.
 5. A pulse generator as claimed in claim 3 wherein said first timing means comprises: a first capacitor and a first diode connected in series between the collector of said first transistor and the base of said second transistor; and a resistor connected from the common point of said first capacitor and said first diode to a source of power.
 6. A pulse generator as claimed in claim 3 wherein said second timing means comprises a second capacitor connected in series with a second resistor across a source of power, the common point of said second capacitor and said second resistor being connected to the base of said first transistor by a second diode.
 7. A pulse generator comprising: a power supply; a first transistor having its emitter-collector junction connected across said power supply in series with a collector load resistor; a first diode; a first capacitor and a first resistor connected in series across said power supply, the common point of said first capacitor and said first resistor being connected to the base of said first transistor by said first diode; means for conveying an input signal to the common point of said first capacitor and said first resistor; a second transistor connected across said power supply in series with a collector load resistor; a second capacitor and a second diode connected in series between the collector of said first transistor and the base of said second transistor; and a second resistor connected from the common point of said second capacitor and said second diode to said power supply, whereby a standard duration pulse may be obtained from the collector of said second transistor upon an appropriate input signal change.
 8. A pulse generator as claimed in claim 7 and further comprising a third transistor connected across said power supply in series with a collector load resistor, the collector of said second transistor being connected to the base of said third transistor, whereby the standard duration pulse is obtained from the collector of said third transistor. 